coreboot
businessWeb Page: http://www.coreboot.org/GSoC
Mailing List: http://www.coreboot.org/Mailinglist
coreboot is a Free Software project aimed at replacing the proprietary BIOS (firmware) found in most of today's computers. coreboot performs the required hardware initialization and then executes a payload to extend features. Some of the many possible payloads are: a Linux kernel, FILO, GRUB2, OpenBIOS, Open Firmware, SmartFirmware, GNUFI (UEFI), Etherboot, SeaBIOS (for booting Windows XP, Windows Vista, Windows 7, NetBSD and Linux), ADLO (for booting Windows 2000 and OpenBSD), Plan 9, or memtest86. As well as the payloads, coreboot relies on critical systems tools like flashrom.
Flashrom is a utility for identifying, reading, writing, verifying and erasing flash chips. It is designed to flash BIOS/EFI/coreboot/firmware/optionROM images on mainboards, network/graphics/storage controller cards, and various programmer devices.
The initial motivation for the project was for the maintenance of large clusters, but unsurprisingly, interest and contributions have come from people with varying backgrounds. The latest version of coreboot can be used in a wide variety of scenarios including clusters, embedded systems, desktop PCs, servers, and more.
Projects
- Coreboot panic room. Diagnostics (also remote flashing) To help developing coreboot code, we have to set-up remote diagnostics (also flashing) interface in coreboot. We will be a able to renew bricked board through serial port or even do some research through registers in case of panic(). This will enable easier development of CAR, chipset, payloads code.
- Coreboot Spice Payload The rationale behind the Coreboot Spice Payload is a software component to provide a virtualized desktop to small devices with minimal hardware and software resources. Once the most of the intensive CPU and GPU tasks are moved to the spice server it is possible to set poor devices with a full functional desktop and minimal software requirements in the client side.
- flashrom: add support for the EC inside intel's ICHs investigate how unlocking of flash regions on newer ICHs work and implement it in flashrom.
- Port coreboot to ARM architecture During this summer, I will port Coreboot to ARM architecture. This is such a huge project. These include building basic ARM layout for coreboot and porting it to some available SOCs.